1. Field of the Invention
The present invention relates to a CAD (Computer-Aided Design) system for designing circuits, such as electronic circuits, and an automatic integrated circuit layout producing system, and more particularly to a method and system for understanding a circuit pattern and laying out circuit elements, employing a knowledge data base.
2. Description of the Prior Art
Function to understand a higher-level structure represented by nets on the basis of the basic net list information of a circuit has not been achieved by the conventional electronic circuit CAD. Accordingly, in laying out a differential amplifier in the layout of a bipolar linear circuit, for instance, it is simple for human to decide a layout conforming to the layout rule for the two component pair transistors (for example, a rule requiring the contiguous and opposite disposition of two pair transistors), whereas it is very difficult for a computer to decide the same. Prior art relating to such a function is described in detail in Jiry Soukup, "Circuit Lay-out", Proc. IEEE, vol. 169, No. 10 , Oct. 1981.
If subcircuits to be recognized need to be defined directly by the elements, variations of the subcircuits with a slight difference must be defined directly and individually, which requires an enormous storage capacity and is difficult to apply to practical circuits of wide variation.
Furthermore, in a conventional automated electronic circuit layout method, the layout of an electronic circuit to be laid out is produced by selecting a layout shape corresponding to the elements of the electronic circuit among a shape data base storing layout shapes of circuit elements. Accordingly, it is impossible to use the layout shape data of the data base, when information for selecting the shape information among those of the shape data base is not given previously. Therefore, in determining the layout of a differntial amplifier, which is often employed in an analog circuit, for instance, a layout meeting a restrictive layout condition that the two pair transistors of the differential amplifier are to be disposed contiguously and oppositely can be determined only when a condition that the differential amplifier shown in a circuit diagram comprises two pair transistors is designated in the circuit diagram and the layout shape of the differential amplifier is provided in the shape data base.
When a layout is produced by a layout designer with reference to a circuit diagram, the layout designer understands the circuit to be a differential amplifier from the net list information of the transistors shown in the circuit diagram, even if the differential amplifier is not particularly indicated, and then the layout designer is able to produce an appropriate layout on the basis of his knowledge of the layout restrictions as to differential amplifiers. The layout shape of the differential amplifier can also be determined from the electrical characteristics of the differential amplifier.
It is desirable to provide a computer with the functions of the layout designer in order to improve the functions of a layout producing system.
Still further, a standard cell system (Saburo Muroga, "VLSI System Design", Wiley Interscience, 1982) has been a well-known automatic layout method for laying out a digital electronic circuit. According to this method, a plurality of the combinations of predetermined elements (transistor and resistance, a plurality of transistors, those elements of different constants) are provided in fixed shapes in a library as standard cells, and the combinations coinciding with the elements of the desired circuit to be laied out are selected and connected.
Recently, the necessity of analog-digital compounded LSIs has increased with the expansion of demand for LSIs, and the curtailment of design work load, particularly, that of the work load on layout designers, is a significant subject. In order to achieve such a subject, an automatic layout system for laying out analog circuits has been desired. However, differing from automated process for laying out a digital circuit, automated process for laying out an analog circuits is required to change the layout shape of circuit elements and parts so as to meet the characteristics of the elements and parts or the shape of the variable area for layout. Accordingly, the conventional standard cell system applicable to the digital system, in which the shapes of cells are fixed, is not applicable to laying out an analog circuit without modification.
Furthermore, in a conventional automatic layout system for laying out electronic circuits of the digital system, elements of known shapes to be laid out are arranged in a manner to reduce the wiring distance between the elements and the elements are interconnected by automatic wiring. When an increased number of elements need to be laid out, even a computer is unable to provide a satisfactory plan of layout, as there are numerous alternative modes of layout.
In a logic language, such as prologue, of knowledge information system for processing such a layout, one of the artificial intelligence techniques employs a system in which various conceptions are stored and retrieved in a mode of conception, "the property 0 of A is V", for example, as described in P. H. Winston, B. K. P. Horn; "LISP", Capt. 22, Addison-Wesley Publishing Co., 1981 and others. In case the layout shape of transistors is stored in laying out a circuit, when information, "The size of the shape of the base diffusion layer of tr1 is 4.times.5" is provided, [4, 5] can be stored with A=tr1, 0=base diffusion and V=shape.
On the contrary, when A and O is given, the value of V can be retrieve. In the above-mentioned example, an answer [4, 5] is given to a question, "What is the shape of the base diffusion of tr1?"
Thus, the retrieval system employing a form of conception represented by A, O and V uses only a simple retrieval keyword expression and a natural language, and hence this retrieval system is capable of storing and retrieving extremely numerous conceptions.
Such a useful A-O-V retrieval system will often be employed in information processing techniques for CAD.
A logic program such as artificial intelligence language Prologue, which has recently become a topic of the related arts, includes a back tracking mechanism and is capable of automatically retrieving an effective plan among various possible alternative plans. Accordingly, this logic program is deemed to occupy an important position in the future CAD techniques.
However, the logic program, in general, does not allow the use of global variables, namely, the common variables in FORTRAN, and hence it is usual to change the program described by the language while the program is executed, to achieve the A-O-V retrieval system on the logic program, which affects adversely to the processing efficiency.